“I think, therefore I am” the famous Descartes’ quote is about the “being”, but how is it possible to pass from the potency of being to the act? We want to say “I thought, therefore I realized”.
The Aristotelian concepts of “potency” and “act” contain the essence of an idea and its realization. So, the question arises spontaneously: when does an idea become feasible? When we communicate it when we share it and that idea travels from mind to mind, but accidents may occur such as misunderstanding.
Modeling is the underlying key of all the engineering activities and is the only way by which people (developers, analysts, … and customers!) can come to an agreement on the system to realize without any ambiguity. Formal methods have not fulfilled the original promise of providing a fully automated zero-defect development process: up to now, formal methods remain a topic reserved to specialized people and that are difficult to integrate into existing and assessed development processes.
Recent software engineering approaches are oriented to raise the level of the abstraction of development and analysis: the Model-Driven Engineering (MDE) body of knowledge. As MDE has been traditionally used for code generation, several research papers demonstrated its feasibility to (partially) automate manual activities also during high-level phases of a system lifecycle as well as in system Verification & Validation (V&V). Our research vision considers two questions. Both are related to two different aspects of the V-model and are related to industrial needs and academic open points. They are:
- can we automate the high-level modeling (UML, SysML, etc.) activity?
- can we deal with the different V&V goals (e.g., performance analysis, functional testing, security validation)?
The first aspect is related to the Requirements Definition and System Specification, and is guided by the following questions:
- is it possible to define a more effective way to express the requirements?
- Is it possible to break down the requirements writing process?
- Is it possible to automate part of the requirements writing process?
Yes! All of this is possible by empowering traditional writing processes with formal grammar and by using Artificial Intelligence algorithms, in particular the Natural Processing Language (NLP) one. By combining exact methods (i.e., formal syntax definition and compiler generation) and NLP, our research aims at supporting the system analyst to develop a UML/SysML model coherent and up-to-date with the set of the requirements in a more efficient way.
On the other hand, the key at the center of our study is the definition of a unifying perspective able to describe each V&V environment into a single modeling framework. This framework could be then supported by automation able to start from a high-level system model and to deal with the different above-mentioned V&V concerns. A typical use case of this framework is functional test case generation, able to generate, at first, abstract test scenarios (according to the set of requirements to validate) and then to translate them into concrete test scripts (adapted to the specific testing environment). The same high-level model could be used to generate other low-level analyzable models for the verification of security properties by means of formal methods (e.g., using the Tamarin model checker, specifically designed for this kind of analysis).
Both the activities can match the needs of flexibility and accuracy that future industrial settings will require.